Dulcimer/circuit_ibm_host/dulcimer.net

346 lines
4.2 KiB
Plaintext

# EESchema Netlist Version 1.1 created 24/3/2009-11:07:28
(
( /49C89FF7 pinhead-1X20 JP1 Keyboard_Rows {Lib=PINHD-1X20}
( 1 /R0 )
( 2 /R1 )
( 3 /R2 )
( 4 /R3 )
( 5 /R4 )
( 6 /R5 )
( 7 /R6 )
( 8 /R7 )
( 9 /R8 )
( 10 /R9 )
( 11 /R10 )
( 12 /R11 )
( 13 /R12 )
( 14 /R13 )
( 15 /R14 )
( 16 /R15 )
( 17 /R16 )
( 18 /R17 )
( 19 /R18 )
( 20 /R19 )
)
( /48044A4D pinhead-2X05M JP7 ISP {Lib=PINHD-2X5M}
( 1 /MOSI )
( 2 VCC )
( 3 ? )
( 4 GND )
( 5 /Reset )
( 6 GND )
( 7 /SCK )
( 8 GND )
( 9 /MISO )
( 10 GND )
)
( /48044A0E pinhead-1X08M JP2 Keyboard_Columns {Lib=PINHD-1X8M}
( 1 /C0 )
( 2 /C1 )
( 3 /C2 )
( 4 /C3 )
( 5 /C4 )
( 6 /MOSI )
( 7 /MISO )
( 8 /SCK )
)
( /480447FC atmel-DIL40 IC1 MEGA32-P {Lib=MEGA32-P}
( 1 /C0 )
( 2 /C1 )
( 3 /C2 )
( 4 /C3 )
( 5 /C4 )
( 6 /MOSI )
( 7 /MISO )
( 8 /SCK )
( 9 /Reset )
( 10 VCC )
( 11 GND )
( 12 N-000043 )
( 13 N-000042 )
( 14 N-000013 )
( 15 ? )
( 16 N-000014 )
( 17 ? )
( 18 /R19 )
( 19 /R18 )
( 20 /R17 )
( 21 /R16 )
( 22 /R15 )
( 23 /R14 )
( 24 /R13 )
( 25 /R12 )
( 26 /R11 )
( 27 /R10 )
( 28 /R9 )
( 29 /R8 )
( 30 ? )
( 31 ? )
( 32 ? )
( 33 /R7 )
( 34 /R6 )
( 35 /R5 )
( 36 /R4 )
( 37 /R3 )
( 38 /R2 )
( 39 /R1 )
( 40 /R0 )
)
( /48044798 $noname D2 3.6V {Lib=ZENER}
( 1 GND )
( 2 N-000010 )
)
( /48044791 $noname D1 3.6V {Lib=ZENER}
( 1 GND )
( 2 N-000009 )
)
( /4804477C $noname X1 12MHz {Lib=CRYSTAL}
( 1 N-000043 )
( 2 N-000042 )
)
( /48044769 $noname C2 10u {Lib=CP}
( 1 VCC )
( 2 GND )
)
( /48044756 $noname C1 100n {Lib=C}
( 1 VCC )
( 2 GND )
)
( /48044754 $noname C4 22p {Lib=C}
( 1 N-000042 )
( 2 GND )
)
( /48044750 $noname C3 22p {Lib=C}
( 1 N-000043 )
( 2 GND )
)
( /48044743 $noname R8 68 {Lib=R}
( 1 N-000009 )
( 2 N-000013 )
)
( /48044741 $noname R7 68 {Lib=R}
( 1 N-000010 )
( 2 N-000014 )
)
( /4804473F $noname R1 10k {Lib=R}
( 1 /Reset )
( 2 VCC )
)
( /4804473B $noname R2 2k2 {Lib=R}
( 1 VCC )
( 2 N-000009 )
)
( /48044739 $noname R6 4k7 {Lib=R}
( 1 N-000009 )
( 2 GND )
)
( /480446AA $noname J1 USB {Lib=USB}
( 1 VCC )
( 2 N-000009 )
( 3 N-000010 )
( 4 GND )
( 5 GND )
( 6 GND )
)
)
*
{ Allowed footprints by component:
$component D2
D?
SO*
SM*
$endlist
$component D1
D?
SO*
SM*
$endlist
$component C2
CP*
SM*
$endlist
$component C1
SM*
C?
C1-1
$endlist
$component C4
SM*
C?
C1-1
$endlist
$component C3
SM*
C?
C1-1
$endlist
$component R8
R?
SM0603
SM0805
$endlist
$component R7
R?
SM0603
SM0805
$endlist
$component R1
R?
SM0603
SM0805
$endlist
$component R2
R?
SM0603
SM0805
$endlist
$component R6
R?
SM0603
SM0805
$endlist
$endfootprintlist
}
{ Pin List by Nets
/Net 3 "R19"
JP1 20
IC1 18
/Net 4 "R18"
JP1 19
IC1 19
/Net 5 "R17"
JP1 18
IC1 20
/Net 6 "R16"
JP1 17
IC1 21
Net 7 "GND"
JP7 10
JP7 8
JP7 6
JP7 4
IC1 11
D2 1
D1 1
C2 2
C1 2
C4 2
C3 2
R6 2
J1 5
J1 6
J1 4
/Net 8 "Reset"
JP7 5
IC1 9
R1 1
Net 9 ""
D1 2
R8 1
R2 2
R6 1
J1 2
Net 10 ""
D2 2
R7 1
J1 3
Net 11 "VCC"
JP7 2
IC1 10
C2 1
C1 1
R1 2
R2 1
J1 1
/Net 12 "MOSI"
JP7 1
JP2 6
IC1 6
Net 13 ""
IC1 14
R8 2
Net 14 ""
IC1 16
R7 2
/Net 15 "R15"
JP1 16
IC1 22
/Net 16 "R14"
JP1 15
IC1 23
/Net 17 "R13"
JP1 14
IC1 24
/Net 18 "R12"
JP1 13
IC1 25
/Net 19 "R11"
JP1 12
IC1 26
/Net 20 "R10"
JP1 11
IC1 27
/Net 21 "R9"
JP1 10
IC1 28
/Net 22 "R8"
JP1 9
IC1 29
/Net 23 "R7"
JP1 8
IC1 33
/Net 24 "R6"
JP1 7
IC1 34
/Net 25 "R5"
JP1 6
IC1 35
/Net 26 "R4"
JP1 5
IC1 36
/Net 27 "R3"
JP1 4
IC1 37
/Net 28 "R2"
JP1 3
IC1 38
/Net 29 "R1"
JP1 2
IC1 39
/Net 30 "R0"
JP1 1
IC1 40
/Net 31 "SCK"
JP7 7
JP2 8
IC1 8
/Net 32 "MISO"
JP7 9
JP2 7
IC1 7
/Net 33 "C4"
JP2 5
IC1 5
/Net 34 "C3"
JP2 4
IC1 4
/Net 35 "C2"
JP2 3
IC1 3
/Net 36 "C1"
JP2 2
IC1 2
/Net 37 "C0"
JP2 1
IC1 1
Net 42 ""
IC1 13
X1 2
C4 1
Net 43 ""
IC1 12
X1 1
C3 1
}
#End